In order to improve an image characteristic, a higher light receiving efficiency is required for a solid-state imaging device typified by a CCD type or MOS type image sensor. Generally, it is known that a converging lens is used to increase a light receiving efficiency.
Also, in recent years, along with the miniaturization of the solid-state imaging device, it is desirable that a pixel size be finer. In order to satisfy such a demand, the pixel size is attempted to be finer by causing a plurality of pixels adjacent to one another to share one gate electrode or one drain region. Hereinafter, a solid-state imaging device having cells each composed of two pixels (as a unit), for example, will be described in detail.
FIG. 9 is a plan view schematically illustrating a conventional solid-state imaging device. Note that FIG. 9 shows a state where a partial structure of the solid-state imaging device is projected onto a main surface of a semiconductor substrate.
The solid-state imaging device shown in FIG. 9 includes a plurality of pixels arranged in a matrix on the semiconductor substrate. Generally, a silicon substrate of n-type is used as the semiconductor substrate. Two pixels 102a and 102b adjacent to each other constitute one cell C. Each of the pixels 102a and 102b includes a photoelectric conversion section (not shown) for converting an incident light into a signal electric charge. Furthermore, light receiving regions 103a and 103b, each region for allowing a light to be incident on the photoelectric conversion section, are formed in predetermined regions in the interior of the pixels 102a and 102b, respectively. Each of the light receiving regions 103a and 103b, having the same shape as one another, is formed at a predetermined position with respect to a center m of each of the pixels 102a and 102b. 
Next, with reference to FIGS. 10 and 11, a positional relationship between the pixel 2 and the light receiving region 3 will be described in more detail.
FIG. 10 is an enlarged view of a portion of FIG. 9 indicated by double-dot-dash lines. FIG. 11 is across-sectional view of the portion along lines XI-XI shown in FIG. 10.
As shown in FIGS. 10 and 11, the conventional solid-state imaging device includes a semiconductor substrate 101, a low concentration p-well layer 104, a high concentration p-well layer 105, a device isolation region 106, a p-type implantation isolation layer 107, p-type photoelectric conversion sections 108a and 108b, n-type photoelectric conversion sections 109a and 109b, gate electrodes 110a and 110b, spacers 111a and 111b, salicide regions 112a and 112b, a drain region 113, a Vt control layer 114, a barrier control layer 115, an insulation film 116, a light shielding film 117, a color filter 118, and converging lenses 119.
The pixel 102a mainly includes the photoelectric conversion sections 108a and 109a forming a photodiode, the gate electrode 110a, the salicide region 112a formed on a surface of the gate electrode 110a, and the device isolation region 106. Similarly, the pixel 102b mainly includes the photoelectric conversion sections 108b and 109b, the gate electrode 110b, the salicide region 112b formed on a surface of the gate electrode 110b, and the device isolation region 106.
The insulation film 116 is formed so as to cover a surface of the semiconductor substrate 101 on which the gate electrodes 110a and 110b are formed. The light shielding film 117, having an opening in a predetermined region above each of the photoelectric conversion sections 109a and 109b, is formed on the insulation film 116. By the opening provided with the light shielding film 117, the light receiving regions 103a and 103a for receiving the incident light so as to be incident on the photoelectric conversion sections 109a and 109b, respectively, are formed.
Furthermore, above the light shielding film 117, the color filter 118 and the plurality of converging lenses 119 provided so as to respectively correspond to the pixels 102a and 102b are formed. In order to converge a light to the pixels 102a and 102b as much as possible, each converging lens 119 is arranged so as to cover the largest possible area occupied by each of the pixels 102a and 102b with respect to the semiconductor substrate 101. Specifically, the converging lens 119 is arranged such that its optical axis Ax passes through the center m of each of the pixels 102a and 102b. 
In the conventional solid-state imaging device, the two pixels 102a and 102b share the drain region 113 so as to constitute one cell, thereby realizing a finer size of a pixel.
[Patent document 1] Japanese Laid-Open Patent Publication No. 8-316448